Career Opportunities

Director of Technical Product Management — AI Data Center Interconnect

Overview

Lead the product strategy and roadmap for Point2’s next‑generation copper, optical, and RF interconnect solutions for AI and hyperscale data centers. Manage and mentor the Technical Product Management team while driving alignment across engineering, sales, marketing, and ecosystem partners.

Responsibilities

• Own product strategy, roadmap, and technical requirements for high‑speed interconnect solutions.
• Lead and develop the Technical Product Management team.
• Translate customer and market needs into clear product specifications and multi‑year plans.
• Partner with engineering on architecture, feature prioritization, and development execution.
• Engage with hyperscalers, OEMs, and ecosystem partners to validate requirements and influence product direction.
• Support product launches, messaging, and customer engagements with marketing and sales.
• Assess competitive offerings and position Point2 products for differentiation.
• Drive cross‑functional alignment across engineering, operations, supply chain, and executive teams.

Qualifications

• 10+ years in technical product management, semiconductor interconnect, near-package, co-packaged I/O systems (NPx/CPx), or high‑speed cable interconnects.
• Strong understanding of data‑center architectures and copper/optical/RF cable interconnect technologies.
• Proven experience defining and launching complex semiconductor or system‑level products.
• Excellent communication and leadership skills with experience influencing cross‑functional teams.
• BS/MS in Electrical Engineering or related field; MBA a plus.

Location(s)

• Silicon Valley, CA (San Jose metro area)
• Irvine, CA (Orange County area)

Technical Product Manager — AI Data Center Interconnect

Overview

Own the roadmap and product definition for next‑generation copper, optical, and RF interconnect solutions used in AI and hyperscale data centers. Combine system‑level technical depth with customer‑facing product leadership.

Responsibilities

• Define product strategy and requirements for high‑speed interconnects (copper, optical, RF).
• Translate customer needs into MRDs/PRDs and drive cross‑functional execution.
• Work with system architects, ASIC/xPU teams, board designers, and SI engineers.
• Support technologies including co‑packaged optics, near‑packaged optics/copper, and advanced interconnect architectures.
• Engage with hyperscalers, OEMs, and ecosystem partners to validate roadmaps and requirements.
• Develop technical collateral and support product launches.

Qualifications

• MS in Electrical Engineering or related field.
• 5–7 years in system design, cable/interconnect design, or technical product management.
• Strong understanding of signal integrity, high‑speed channels, and data‑center system architectures.
• Experience working with technical and commercial customer teams.
• Excellent communication and cross‑functional leadership skills.

Location(s)

• Silicon Valley, CA (San Jose metro area)
• Irvine, CA (Orange County area) 

Director/Senior Manager, Marketing & Communications

Overview

Lead Point2’s marketing, communications, events, and social media strategy. Drive brand visibility and storytelling for advanced AI interconnect technologies. No engineering degree required—just the ability to learn and communicate complex concepts clearly.

Responsibilities

• Develop and execute integrated marketing and communications strategy.
• Lead global event strategy and execution (OFC, SC, Hot Chips, OCP, etc.).
• Manage LinkedIn and social media campaigns, content calendars, and executive visibility.
• Create press releases, messaging, presentations, and corporate communications.
• Collaborate with external PR agencies to amplify announcements and media coverage.
• Support customer, partner, and ecosystem engagement with clear, compelling content.

Qualifications

• 7–12 years in marketing, communications, or events in B2B technology.
• Experience managing events and LinkedIn‑focused campaigns.
• Strong writing, storytelling, and cross‑functional collaboration skills.
• Experience working with PR agencies.
• Bachelor’s degree in marketing, communications, business, or related field.

Location(s)

• San Jose, CA

Sr. Customer Program & Product Manager — Semiconductor & Systems

Overview

Lead customer programs and technical engagements for semiconductor, system, and interconnect products. Combine hands‑on engineering experience with strong program management and customer‑facing leadership.

Responsibilities

• Serve as primary technical and program interface for key customers.
• Align program plans with customer go‑to‑market timelines and ensure on‑time delivery.
• Influence internal and customer stakeholders when schedules slip to drive corrective action.
• Work directly with customer design teams (board, firmware, manufacturing).
• Coordinate across the interconnect ecosystem: raw materials, cable/connector vendors, module partners.
• Drive cross‑functional alignment across engineering, operations, supply chain, and sales.
• Support technical reviews, system bring‑up, validation, and issue resolution.

Qualifications

• BS/MS in Electrical or Computer Engineering.
• 7–12 years in system design: semiconductor, board design, firmware, or system integration.
• Experience with RF systems, high‑speed interconnects, and cable/connector technologies.
• Strong customer‑facing and cross‑functional leadership skills.
• Ability to manage complex programs and influence stakeholders across organizations.

Location(s)

• Silicon Valley, CA (San Jose metro area)
• Irvine, CA (Orange County area)

Senior Engineer, Field Applications (Multiple Positions)

Overview

Support key customer designs and drive adoption of Point2’s e-Tube RF Transmitter and Receiver SoCs across cable manufacturers, hyperscale data centers, neo-cloud operators, and enterprise data centers. Combine hands‑on engineering expertise with strong customer engagement skills to solve technical challenges, guide system integration, and help secure major design wins.

Responsibilities

• Partner with sales to win customer designs by providing technical leadership, solution guidance, and high‑quality support.
• Prepare and deliver technical presentations, statements of work, and solution proposals aligned to customer requirements.
• Lead hands‑on board bring‑up, debugging, and system validation for customer projects.
• Support customer integration of APIs, firmware, device configurations, and system‑level features.
• Participate in customer lab trials, field trials, proofs of concept, and engineering studies.
• Troubleshoot customer issues remotely and onsite, ensuring rapid resolution and successful deployment.
• Build deep technical relationships with customer engineering teams and understand their application environments.
• Provide field insights to influence product roadmaps, new feature development, and competitive positioning.
• Represent Point2 at customer sites, industry events, and technical conferences.

Qualifications

• BS/MS in Electrical Engineering or equivalent.
• 5+ years in applications engineering, board development, system design/architecture, or firmware development.
• Experience testing Ethernet‑based active cables or transceiver modules for data‑centers
• Proficiency in C, C++, and Python.
• Strong understanding of electrical, mechanical, software, and test aspects of SFP/QSFP/QSFP‑DD/OSFP pluggable cables and modules.
• Excellent communication skills and ability to work collaboratively across diverse, multicultural teams.

Preferred Qualifications

• Experience with link budget analysis, analog/digital circuit analysis, signal integrity, and channel modeling.
• Familiarity with active electrical or optical interconnects used in data centers.
• Experience with EM analysis and firmware development on MCUs (STM32, MAX32).
• Background in SFP/QSFP/OSFP module design, PCB layout, and RF transmission line design.

Location(s)

• Silicon Valley, CA (San Jose metro area)
• Irvine, CA (Orange County area)

Director of Global Sales

Drive sales of Point2’s advanced e-Tube Technology – RF data transmission over plastic cable interconnect SoCs across Tier‑1 cable manufacturers, hyperscale data centers, neo-cloud operations, and network equipment manufacturers. Lead strategic account development, create demand, close design wins and drive revenue for next‑generation data center Top-of-Rack (ToR) Switch, SuperNIC/server, XPU scale-up switch fabric network upgrades, and build long‑term customer and partner relationships.

Responsibilities

• Develop and execute global sales and account strategies targeting tier 1 hyperscaler data center customers, cable manufacturers, neo-cloud providers and NEMs.
• Build and maintain executive‑level and engineering‑level relationships at key accounts, supported by a virtual cross‑functional team.
• Identify next‑generation XPU/network fabric upgrade cycles and create and align account plans to intercept customer roadmaps and deployment timelines.
• Position Point2 solutions against competitive offerings and articulate clear differentiation.
• Collaborate closely with marketing, applications engineering, operations, and product teams to support sales activities, messaging, and customer engagements.
• Drive ecosystem partnerships to deliver complete reference designs and system‑level solutions.
• Facilitate demos, PoCs, training, and technical support to accelerate traction and secure design wins.
• Assess global market trends and competitive threats to refine strategy and influence product direction.

Qualifications

• 10+ years of technical sales, business development, or applications experience in data center cable interconnect, retimer ICs or related SoC/module markets.
• 2+ years creating demand with Tier‑1 hyperscale data center and accelerator manufacturers in North America, with a track record of securing deals.
• Strong ability to build ecosystem partnerships across suppliers, module vendors, and system integrators.
• Excellent leadership, communication, and organizational skills.
• Extensive customer‑facing experience with both technical, commercial and C-level stakeholders.
• Self‑motivated and able to operate independently.
• Passionate about working in a fast-paced environment.
• BS in Electrical Engineering, Computer Science, or equivalent; MBA a plus.

Location(s)

• Silicon Valley, CA (San Jose metro area)

RFIC Design Engineer — mmWave & Sub‑THz Integrated Circuits (Multiple Positions)

Overview

Design next‑generation RF integrated circuits that enable ultra‑high‑speed interconnects for modern data centers. Work on cutting‑edge mmWave and sub‑THz ICs and contribute directly to Point2’s core product architecture. Join a highly technical, fast‑paced team pushing the limits of high‑frequency performance.

Responsibilities

• Design RFIC blocks including RX/TX amplifiers, PLLs, clock drivers, and other high‑frequency analog circuits.
• Perform schematic‑level and layout‑level design in advanced SiGe and CMOS technologies.
• Model and analyze high‑frequency effects including parasitics, coupling, EM behavior, and transmission‑line interactions.
• Use industry‑standard tools such as Cadence, EMX, and Calibre for design, simulation, and verification.
• Collaborate with cross‑functional engineering teams to integrate RFIC blocks into system‑level architectures.
• Contribute to design reviews, architecture discussions, and high‑frequency performance optimization.

Qualifications

• Ph.D. in Electrical Engineering, or M.S. with 3+ years of relevant industry experience.
• Hands‑on experience designing RFIC blocks at mmWave or sub‑THz frequencies.
• Strong understanding of high‑frequency IC fundamentals including EM effects, layout impacts, and transmission‑line behavior.
• Proficiency with Cadence, EMX, and Calibre; Unix/SKILL experience a plus.
• Strong teamwork, communication, and multitasking skills in a fast‑moving environment.

Location(s)

• Silicon Valley, CA (San Jose metro area)
• Irvine, CA (Orange County area)
• Seoul, South Korea

Analog IC Design Engineer — High‑Speed Links & Advanced Analog Circuits (Multiple Positions)

Overview

Design advanced analog integrated circuits that enable the next-generation of ultra‑high‑speed interconnects for modern data centers. Work on high‑speed CTLEs, VGAs, PLLs, regulators, and other precision analog blocks for 100s‑of‑Gbps links. Join a fast‑paced, highly technical team where your designs directly shape Point2’s core product architecture and high‑frequency performance.

Responsibilities

• Design analog IC blocks including CTLEs, VGAs, bias circuits, PLLs, regulators, and other high‑speed analog functions.
• Perform schematic and layout design in advanced SiGe and CMOS technologies.
• Analyze high‑frequency behavior including parasitics, coupling, EM effects, and transmission‑line interactions.
• Use Cadence, EMX, and Calibre for design, simulation, and verification.
• Collaborate with cross‑functional engineering teams to integrate analog blocks into system‑level architectures.
• Participate in design reviews and contribute to performance optimization.

Qualifications

• Ph.D. in Electrical Engineering, or M.S. with 3+ years of relevant industry experience.
• Hands‑on experience designing analog IC blocks for high‑speed applications.
• Strong understanding of DC‑to‑tens‑of‑GHz analog design fundamentals.
• Proficiency with Cadence, EMX, and Calibre; Unix/SKILL experience a plus.
• Strong teamwork, communication, and multitasking skills.

Location(s)

• Silicon Valley, CA (San Jose metro area)
• Irvine, CA (Orange County area)
• Seoul, South Korea

Signal Integrity & Interconnect Engineer — High‑Speed Channels & mmWave Packaging

Overview

Design and optimize the high‑speed interconnect “highways” that enable Point2’s next‑generation ultra‑high‑speed data‑center links. Work across die, package, PCB, and complex mechanical connectors to ensure flawless signal transmission at mmWave and sub‑THz frequencies. Join a fast‑paced, highly technical team where your SI expertise directly shapes system performance and product success.

Responsibilities

• Design and model high‑speed interconnects from silicon die through package, PCB, and external connectors.
• Define system architecture for near-package and co-package e-Tube for datacenter rack backplane
• Use advanced 3D EM simulation tools (e.g., HFSS) to model vias, transitions, connectors, and complex channel structures.
• Optimize channel performance for mmWave and sub‑THz operation, including parasitics, coupling, and EM behavior.
• Perform post‑fabrication lab validation using VNAs, TDRs, high‑speed oscilloscopes, and BERTs.
• Correlate simulation results with measured data and refine models for accuracy and performance.
• Collaborate closely with RFIC designers, mechanical engineers, and system architects on co‑design and integration.
• Contribute to design reviews, architecture discussions, and system‑level SI strategy.

Qualifications

• Ph.D. in Electrical Engineering, Physics, or related field, or M.S. with 3+ years of relevant industry experience.
• Extensive hands‑on experience with 3D EM simulation for SI/PI modeling of PCB interconnects, vias, and connectors.
• Experience with data center AI cluster scale-up architecture, system configuration, connectivity technologies, and SI models
• Standards knowledge with Ethernet, PCIe, NVLink, UALink, IEEE 802.3xx
• Strong background in high‑frequency lab measurements and model‑to‑hardware correlation.
• Excellent problem‑solving, communication, and cross‑functional collaboration skills.

Location(s)

• Silicon Valley, CA (San Jose metro area)
• Irvine, CA (Orange County area)
• Seoul, South Korea

Director of Test Engineering — RF & High‑Speed Semiconductor

Overview

Lead Point2’s test engineering organization responsible for validating advanced RF, high‑speed analog, and mixed‑signal semiconductor products. Own test strategy, infrastructure, and execution across wafer, package, and system‑level testing to ensure performance, reliability, and manufacturability.

Responsibilities

• Lead and mentor the Test Engineering team across characterization, validation, and production test.
• Define test strategies for RF, high‑speed analog, and mixed‑signal semiconductor devices.
• Oversee ATE program development, load boards, probe cards, and automated test systems.
• Drive RF/mmWave/sub‑THz measurement methodologies and silicon bring‑up.
• Partner with design, product, packaging, and operations teams to ensure testability and yield.
• Manage vendor relationships with OSATs, test houses, and equipment suppliers.
• Support customer evaluations, reliability testing, and production readiness.

Qualifications

• 10+ years in semiconductor test engineering with leadership experience.
• Deep expertise in RF, high‑speed analog, or mixed‑signal test methodologies.
• Strong background in ATE development and high‑frequency measurement equipment.
• Experience with wafer‑probe, package‑level test, and high‑volume manufacturing.
• Excellent communication and cross‑functional leadership skills.
• BS/MS in Electrical Engineering or related field; Ph.D. a plus.

Location(s)

• Silicon Valley, CA (San Jose metro area)
• Irvine, CA (Orange County area)
• Seoul, South Korea

Director of Applications Engineering

Overview

Lead Point2’s Applications Engineering team supporting customer design‑ins, system integration, and deployment of advanced high‑speed interconnect solutions. Oversee all technical customer engagements and guide a team of Senior Field Applications Engineers.

Responsibilities

• Lead, mentor, and scale the Applications Engineering team.
• Own customer technical engagement from evaluation through production.
• Partner with sales to secure design wins and ensure technical alignment.
• Oversee technical collateral, demos, presentations, and statements of work.
• Drive issue resolution and cross‑functional escalation with engineering and product teams.
• Provide field insights to influence product roadmaps and competitive positioning.
• Establish best practices for customer support, lab validation, and field trials.
• Represent Point2 in key customer meetings and industry events.

Qualifications

• 10+ years in applications engineering, system design, or customer‑facing technical leadership in semiconductors or high‑speed interconnects.
• Strong understanding of Ethernet, optical/electrical modules, and high‑speed SerDes.
• Proven experience leading technical teams and customer engagements.
• Excellent communication and cross‑functional leadership skills.
• BS/MS in Electrical Engineering or related field.

Location(s)

• Silicon Valley, CA (San Jose metro area)
• Irvine, CA (Orange County area)
• Seoul, South Korea

System Design Engineer (Multiple Positions)

Overview

Own the system-level specifications and perform the critical modeling and link-budget analysis necessary to ensure seamless end-to-end data integrity. Bridge the gap between high-speed ASICs and complex transmission channels. Join a highly technical, fast‑paced team pushing the limits of high‑frequency performance.

Responsibilities

• Translate top-level system requirements into detailed specifications for baseband blocks and RF/high-speed transmission channels.
• Develop comprehensive end-to-end system models in MATLAB/Simulink to simulate link performance, accounting for noise, non-linearity, and frequency-dependent losses.
• Conduct link-budget analysis to determine gain, noise figure, and power requirements across the entire signal chain.
• Act as the central integration point for sub-block designs. You will ingest circuit-level data from ASIC and Channel designers to verify that integrated block-level performance meets the overall system-level targets.
• Evaluate and define the optimal balance between analog/RF front-end performance and digital equalization strategies (e.g., FFE/DFE/MLSE).

Qualifications

• Ph.D. in Electrical Engineering, or M.S. with 3+ years of relevant industry experience.
• Expert-level capability in MATLAB for modeling physical layer impairments and performing statistical link analysis.
• Strong familiarity with the operating principles of RF blocks (Mixers, Amplifiers), Analog Front-Ends (CTLE, VGA), and Digital Equalization techniques (FFE, DFE, MLSE).
• A proven ability to look at a high-speed signal path and identify where architectural trade-offs (e.g., power vs. performance) should be made to meet rigorous system specs.
• Strong teamwork, communication, and multitasking skills in a fast‑moving environment.

Location(s)

• Silicon Valley, CA (San Jose metro area)
• Irvine, CA (Orange County area)